HDL Works

HDL Works is a supplier of front-end VHDL / Verilog design tools, translators and an FPGA / PCB pin assignment verification tool.
HDL Works has over 15 years experience developing HDL tools.

All tools are available on Windows and Linux operating systems.

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ConnTrace

HDL Works is developing ConnTrace: a new tool to trace and verify the connectivity between PCBs. The PCB can be connected using connectors and cables or via a backplane. No matter how the PCBs are connected, ConnTrace will show a trace of all connected signals in the design.

HDL Works is looking for companies that would like to particpate in the beta fase of ConTrace and testdrive the tool or supply us with a testdesign. Read more...

Design & Verification Products

EASE Graphical HDL Design tool.
Combines block diagrams, state diagrams, truth tables and HDL code.
HDL Companion The SWISS Army knife for every HDL Design Engineer
It will give you a complete overview of any VHDL or Verilog design in seconds.
Features include verification, linting and HTML generation.
IO Checker When using large FPGA's on a PCB making sure that the FPGA pins are connected to the right signals is a cumbersome task.
IO Checker uses rules (based on regular expressions) to match the signal names in both the FPGA and PCB design environment.
Scriptum A text editor focused at VHDL and Verilog, using a Multiple Document Interface.
(Free of charge)
ConnTrace ConnTrace is used to verify the connections between various PCB's, Independant on how your PCBs are connected (backplanes, connectors and/or rear panels). ConnTrace will present a view of the connections in seconds.

New: HDL Companion 2.5

October 2011: HDL Works has released HDL Companion 2.5

What is newWhat is new in 2.5
Free 14 day trialFree 14 day trial

New: EASE 7.4

March 2011: HDL Works has released EASE 7.4

What is newWhat is new in 7.4
Free 14 day trialFree 14 day trial

IO Checker 2.1

What is newWhat is new in 2.1
Free 14 day trialFree 14 day trial IO Checker overview

Translation products and services

FLDL2HDL Fujitsu FLDL netlist and FTDL test format translated into a VHDL or Verilog netlist.

Upcoming events

HDL Works is exhibiting at the Bits-Chips Hardware Conference 2012
on June 13. Please visit us.
Location: 1931 Congrescentrum Brabanthallen
Oude Engelenseweg 1
5222 AA ’s-Hertogenbosch
Nederland
Hardware Conference 2012
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