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Most important new functionality in 8.0 is the virtual record.
A virtual record is like a VHDL record in that it is a collection of signals, shown as a single signal object.
Unlike a VHDL record, the virtual record will be expanded into the individual signals in the generated HDL.
The virtual record type can be used as a port on an entity/module and as a port or wire in a diagram.
The goal is to decrease the block diagram complexity and increase design flexibility.
On the right is an example of an entity with 83 ports. Using virtual records for groups like ddr2 and ethernet the visible amount of ports is only 32 ports
What is new in 8.0
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