HDL Works

HDL Works is a supplier of front-end VHDL / Verilog design tools, translators and an FPGA / PCB pin assignment verification tool.
HDL Works has over 15 years experience developing HDL tools.

All tools are available on Windows, Linux and Solaris operating systems.

Design & Verification Products

	EASE	Graphical HDL Design tool. Combines block diagrams, state diagrams, truth tables and HDL code.
	HDL Companion	The SWISS Army knife for every HDL Design Engineer It will give you a complete overview of any VHDL or Verilog design in seconds. Features include verification, linting and HTML generation.
	IO Checker	When using large FPGA's on a PCB making sure that the FPGA pins are connected to the right signals is a cumbersome task. IO Checker uses rules (based on regular expressions) to match the signal names in both the FPGA and PCB design environment.
	Scriptum	A text editor focused at VHDL and Verilog, using a Multiple Document Interface. (Free of charge)

March 2009, HDL Works has released HDLCompanion version 2.3

What is new in 2.3

Free 14 day trial

January 2009, HDL Works has released EASE version 7.2

What is new in 7.2

Free 14 day trial

Translation products and services