HDL Design & Verification Products

HDL Works has three products for HDL development and one for verification. They all offer the novice and experienced HDL designers a flexible way to manage and develop their HDL projects.

EASE Graphical HDL Design tool.
Combines block diagrams, state diagrams, truth tables and HDL code.

Why use graphical entry ?
HDL Companion The SWISS Army knife for every HDL Design Engineer
It will give you a complete overview of any VHDL or Verilog design in seconds.
Features include verification, linting and HTML generation.
IO Checker FPGA versus PCB pin assignment verification.
IO Checker uses rules (based on regular expressions) to match the signals names in both the FPGA and PCB design environment.
Scriptum A text editor focused at VHDL and Verilog, using a Multiple Document Interface.
(Free of charge)

HDL Translation Services

HDL Works offers several translators to VHDL and Verilog. With our long experience with language parsers and our software components we are able to develop custom translators in a short time frame. If you have a requirement for translating a specific format into VHDL or Verilog please contact us at .

AHDL2HDL Translates Altera AHDL designs into VHDL or Verilog.
FLDL2HDL Translates Fujitsu's FLDL and FTDL to VHDL.
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