What's new in HDL Companion 3.0
HDL Companion now supports SystemVerilog (both 2005 and 2009 mode). Files with extension ‘.sv’ and ‘.svh’ are placed in the new file category SystemVerilog. They can be combined with regular Verilog files. The toplevel units which can be shown in the detailed view are:
Verilog compilation unit
The Verilog language has a concept called the 'compilation unit'. It is the group of files which are compiled together in one action. During such a compilation objects declared at the file level will remainin scope and valid until the compilation finishes. This is sometimes required for include files which are not explicitly included in all source files, but just in the first compiled file. Compilation units can be set in the Project properties dialog on the File compilation units page.
Code convention checkingNew coding standards checks are:
- No tab characters.
- Use a consistent indent.
- VHDL keywords all upper or lower case.
- Filename conventions checks.
LintThe Verilog lint checks have been extended to SystemVerilog.
New lint checks are:
- OS4: VHDL lint check for integer/natural/positive signals without a range constraint.
- OS5: Only use rising edge clock.
- OS6: Avoid using shared variables.
- CP14: VHDL CP14 lint check now also checks for unused enumerated values for enumerated types declared inside architectures.
- Misc 16: use of reserved identifiers (like Verilog keywords in VHDL and vice versa).
- Misc17: only allow generics and ports inside an entity.