HDL Works offers you a solution to translate FLDL-E (The Extended Fujitsu Logic Description Language) and FTDL-E (The Extended Fujitsu Test data Description Language) to VHDL.
HDL Works developed sofware that is able to translate the FLDL netlist and most
of the FTDL automatically. The resulting VHDL netlist in combination with the
technology library is synthesizable with all major synthesis tools. The FTDL
testvectors are translated into VHDL and should pass in any simulator to ensure
correctness of the translated netlist and technolgy library.
Several Fujitsu ASICs have been succesfully converted into FPGAs by Thales Naval Systems using this translator.
The translation is available both as a software program and as a service.
Other libraries can be created on demand.
The following (test) constructs described by the keywords below in the FTDL language are currently not supported.
For more information or a quote on the translation of your FLDL/FTDL to
VHDL (or Verilog) please contact HDL Works at
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